Tradeoffs in Low-Power Accelerators Design for Large-Scale Interferometers
DescriptionLarge-scale scientific infrastructures like SKAO—the world’s largest radio observatory for the coming decades—are generating massive-scale data streams of multi-Tb/s to be processed using complex interferometry algorithms. Concretely, SKAO is expected to generate over 710 petabytes per year of data products with a limited energy budget caped to 1 MWatt per site. We address the computing sustainability of this scientific endeavour from a holistic hardware-software codesign point of view. Our work analyses the tradeoffs of using novel reconfigurable domain-specific processor designs tailored for the interferometry domain in an application-specific multiprocessor system. We aim to design custom energy-efficient hardware architectures and heterogeneous scheduling techniques that will help SKAO meet its accuracy, energy efficiency, performance, and scalability requirements while keeping in check the overall cost. One of our biggest challenges is that high-performance software decisions cannot be fixed early in SKAO construction. The adoption and usefulness of custom hardware designs depend on how well we can bridge the programmability and performance gap between general-purpose processors and domain-specific processors for the interferometry domain. Thus, a top-down and bottom-up approach in collaboration with astronomers and computer architects will be required to converge to impactful, low-power, high-performance computing solutions.
TimeWednesday, June 2815:30 - 16:00 CEST
LocationSanada I
Session Chair
Event Type
Computer Science, Machine Learning, and Applied Mathematics